As a power device to be used in an inverter or the like, the use of a SiC-MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) utilizing a silicon carbide substrate has been proposed (Patent Document 1). One of the problems related to the on-resistance of this SiC-MOSFET is a low channel mobility that is inherent to SiC. In general, a 4H—SiC substrate is used as a substrate thereof. The 4H—SiC substrate has two surfaces of a Si surface and a C surface, and in the case of, for example, a general DMOSFET (Double-diffused MOSFET) using a Si surface as a channel, even when the application of a SiON film (silicon oxynitride film) to a gate insulating film and the use of a buried channel which are considered to be useful for the improvement of channel mobility are taken into consideration, the channel mobility is as low as 50 cm2/Vs or less. This is smaller by one order of magnitude in comparison with that of a Si-MOSFET. For this reason, among the parasitic resistance components of the SiC power MOSFET, the ratio occupied by the channel resistance component is the highest. Even when the C surface having a comparatively high channel mobility is utilized, the problem of this high channel resistance still remains as a big problem of the SiC power MOSFET.
Because of the presence of the problem of this low channel mobility, in the conventional technique, the gate length of the DMOSFET is shortened so as to reduce the channel resistance, thereby reducing the on-resistance of the DMOSFET.